1. Field of the Invention
This invention relates generally to semiconductor fabrication technology, and, more particularly, to a method for semiconductor fabrication supervision and optimization.
2. Description of the Related Art
There is a constant drive within the semiconductor industry to increase the quality, reliability and throughput of integrated circuit devices, e.g., microprocessors, memory devices, and the like. This drive is fueled by consumer demands for higher quality computers and electronic devices that operate more reliably. These demands have resulted in a continual improvement in the manufacture of semiconductor devices, e.g., transistors, as well as in the manufacture of integrated circuit devices incorporating such transistors. Additionally, reducing defects in the manufacture of the components of a typical transistor also lowers the overall cost per transistor as well as the cost of integrated circuit devices incorporating such transistors.
The technologies underlying semiconductor processing tools have attracted increased attention over the last several years, resulting in substantial refinements. However, despite the advances made in this area, many of the processing tools that are currently commercially available suffer certain deficiencies. In particular, such tools often lack advanced process data monitoring capabilities, such as the ability to provide historical parametric data in a user-friendly format, as well as event logging, real-time graphical display of both current processing parameters and the processing parameters of the entire run, and remote, i.e., local site and worldwide, monitoring. These deficiencies can engender nonoptimal control of critical processing parameters, such as throughput accuracy, stability and repeatability, processing temperatures, mechanical tool parameters, and the like. This variability manifests itself as within-run disparities, run-to-run disparities and tool-to-tool disparities that can propagate into deviations in product quality and performance, whereas an improved monitoring and diagnostics system for such tools would provide a means of monitoring this variability, as well as providing means for optimizing control of critical parameters.
Among the parameters it would be useful to monitor and control are metal layer thickness and metal layer thickness variations. Typically, following deposition of a metal layer, the metal layer is patterned and etched. However, due to variations in the metal layer thickness, the etch processing parameters typically have to be set to handle the xe2x80x9cworst case scenarioxe2x80x9d that would provide for etching of the thickest of metal layers. Setting the etch processing parameters to provide for etching of the thickest of metal layers, however, typically leads to gouging of any underlying dielectric layers and/or undercutting or xe2x80x9cfootingxe2x80x9d of any overlying anti-reflective coating layers and/or bottom films. This gouging and/or undercutting typically occurs when the metal layer is thinner than the thickest of metal layers.
For example, as shown in FIG. 1, conventional etch processing that is designed to etch metal layers as thick as tdd1 (FIGS. 4 and 5) leads to gouging 605 of an underlying dielectric layer 305, and undercutting 600 of an overlying anti-reflective coating layer 315 when the metal layer is thinner than anticipated, e.g., when the metal layer 310 is only as thick as td2 (FIGS. 6 and 7). The gouging of any underlying dielectric layers and/or under-cutting or xe2x80x9cfootingxe2x80x9d of any overlying anti-reflective coating layers and/or bottom films, in turn, decreases the ability to fill gaps with a subsequent gap-filling dielectric deposition. This may lead to inaccuracies and complications in the manufacturing processes.
The present invention is directed to overcoming, or at least reducing the effects of, one or more of the problems set forth above.
The present invention is directed to a control methodology useful in the manufacture of integrated circuit devices. In one illustrative embodiment, a method is disclosed herein that is comprised of forming a metal layer above a structure layer on a workpiece, measuring a thickness of the metal layer, determining, based upon the measured thickness of the metal layer, at least one parameter of an etching process to be performed on the metal layer, and performing the etching process comprised of the determined parameter on the metal layer. The thickness measurements may be made at one or more locations, and they may reflect across-layer thickness variations in the metal layer. The parameters of the etching process that may be varied include, along others, etch duration, process gas flow rates, pressure, backside cooling gas flow rates, power settings, etc.
Also disclosed herein is a system comprised of a deposition tool for forming a metal layer above a structure layer on a workpiece, a metrology tool for measuring a thickness of the metal layer, a controller for determining, based upon the measured thickness of the metal layer, at least one parameter of an etch process to be performed on the metal layer, and an etch tool adapted to perform an etch process comprised of the determined parameter on the metal layer.